1. Field of the Invention
This invention relates generally to computer systems and more particularly to a method and apparatus for refreshing a display panel.
2. Description of the Related Art
Display controllers typically support an indirect addressing mode for a host interface. This indirect addressing mode typically requires a read/write strobe signal, chip select signal, register select signal, and a data bus. An indirect interface offers the advantage of a low pin count in exchange for a decrease in performance. The indirect interface typically requires two accesses to write to a register location, 1) an index cycle and 2) a data cycle. The index cycle sets up an address pointer to the register to be accessed, while the data cycle reads from or writes data to that specified register.
Thus, the internal memory of the display controller is not directly accessible as the access is through registers, e.g., memory address registers (which depending on the bus width can be several) and memory data registers. Accessing non-consecutive areas of memory results in decreased throughput because non-consecutive accesses require an index and data cycle to the memory address register and the memory data register. For example, to access memory location 0000 h in a typical 16-bit addressable 8-bit wide indirect interface requires 9 bus cycles (6 index cycles and 3 data cycles) to setup the memory address pointer, and then 3 bus cycles (2 index and 1 data cycle) to read/write data to the memory location. Thus, if memory is to be accessed in non-sequential fashion, each memory access requires 12 cycles per memory access.
As a result, there is a need to solve the problems of the prior art to provide an apparatus and method to more efficiently access memory under an indirect addressing scheme.